Photolithographic techniques are commonly used in the fabrication of integrated circuits. Photolithography entails coating a surface of a substrate that is to be etched with a photoresist, which is then selectively exposed to electromagnetic radiation, for example using a reticle to define a selective exposure pattern on the photoresist, and developed to define a pattern in the photoresist, which is then used as an etch mask. The patterned photoresist material is removed from the substrate after it has been used as an etch mask.
Photoresists are classified according to their response to electromagnetic radiation. Positive photoresists are applied to substrate surfaces as polymers, selected portions of which depolymerize when exposed to electromagnetic radiation, for instance using a reticle to define the selective exposure pattern. The depolymerized portions are then removed from the substrate surface by a developing treatment, such as by exposure to a developing solvent that selectively dissolves depolymerized photoresist. The pattern formed by the photoresist matches the reticle pattern. Negative photoresists are applied as monomers or low molecular weight polymers, which polymerize or cross-link upon exposure to electromagnetic radiation. In the case of a negative photoresist, the unexposed portions of the selectively exposed photoresist are removed during development. The pattern formed by exposure and development is the negative image of the reticle. Hence the designation as a negative photoresist. Photoresists that selectively react (i.e. depolymerize, polymerize or cross-link) when exposed to DUV (i.e. ultraviolet light having a wavelength of less than about 300 nm) are referred to as DUV photoresists.
Photolithographic techniques are applicable to selective etching of many different materials. For instance, etching of a dielectric is commonly achieved by dry etching of a dielectric using a patterned photoresist as an etch mask. Dry etching methods include plasma etching (PE) and reactive ion etching (RIE). In both plasma etching and RIE there is the potential chemicals in the etch chemistry to poison later-deposited photoresists. It is common to use N2 in dry etching to provide selectivity control and profile control. The amount of N2 is adjusted in relation to the etchant to provide optimal control of selectivity and profile characteristics. However, in such etching processes, N2 may become embedded in dielectric layers. Such N2 may then diffuse into a later-deposited photoresist layer, where it can interfere with the photochemistry of the photoresist. Thus, N2 introduced during etching can poison photoresist layers, and thereby interfere with later processing steps.
Modern integrated circuit fabrication commonly requires two or more photolithographic steps. For instance, in a so-called dual damascene process, two photolithographic steps are used to define a hole (via) and a trench. A first photolithographic step is carried out to form a hole or via through a dielectric layer, such as an SiO2 or an SiON layer, to a conductive layer beneath the dielectric layer. A second photolithographic step is then carried out to form a trench connecting to the via. In such a process, a first photoresist is applied to the surface of a dielectric layer, and the photoresist is then selectively exposed and developed to form a via pattern. The via is then formed by selectively etching through the dielectric to the underlying conductive layer by, for instance, anisotropic dry etching or reactive ion etching (RIE) in a vertical direction. Once the via is formed, the first photoresist layer is removed, typically by one or more ash steps. A second photoresist layer is then applied, exposed, and developed to form a trench pattern. This is followed by a second etch step, using the second photoresist as a mask. The second photoresist layer is then removed, the via and trench are filled with a conductive material, such as a metal or a silicide, and then the conductive material is planarized back to the level of the dielectric surface.
In the dual damascene process described above, it is essential to remove all exposed photoresist (in the case of a positive photoresist) or unexposed photoresist (in the case of a negative photoresist) during the developing step of each stage of photolithographic processing, because residual photoresist acts as an etch mask. Contaminants in the dielectric may poison photoresists, resulting in defective etching of the substrate. While typical clean room conditions generally ensure that the first photoresist layer will experience little interference from exogenous chemical contaminants, second and subsequent photoresist layers may be contaminated by a number of chemical contaminants (photoresist poisons), such as N2 embedded in the substrate to be etched. Photoresist poisons tend to block the electromagnetic radiation-induced reaction (depolymerization, polymerization or crosslinking) in the selectively exposed photoresist, resulting in incomplete developing of the photoresist pattern.
To illustrate the problem, a typical prior art process for forming a via and trench combination is depicted in FIGS. 1A-1H. The prior art process is illustrated for the case where the photoresist layers are both positive photoresists, however the skilled artisan will recognize that this is merely illustrative and that the same principles apply to negative photoresists.
A precursor 10 comprising a conductive layer 12 and a dielectric layer 14 is depicted in FIG. 1A. A person skilled in the art will recognize that the precursor 10 can include other features that are not shown because they are not essential to understanding the prior art process. Such other features include, for instance, MOS devices, resistors, capacitors, etc. The conductive layer 12 may be, for instance, aluminum, copper, metal silicide, or other suitable conductor. The dielectric layer 14 may include, for instance, SiO2 or a low K dielectric material.
As depicted in FIG. 1B, a first photoresist layer 16, is applied over the dielectric layer 14 by an art recognized method, such as by a spin-on technique. The photoresist layer 16 is then selectively exposed and developed to form a patterned photoresist layer 16, as depicted in FIG. 1C. Next, the portion of dielectric layer 14 that is exposed through the first photoresist layer 16 is etched, for instance by anisotropic dry etching in the vertical direction, to partially expose conductive layer 12, as depicted in FIG. 1D. Photoresist poison 18 is embedded in the dielectric layer 14 during the etching process. The source of photoresist poison 18 in this regard is N2 that has been added to the etch chemistry to control profile and selectivity.
Then, the photoresist layer is removed by, for instance, a plasma ash, thereby producing the etched dielectric 14 depicted in FIG. 1E. The article 10 comprises conductive layer 12 and etched dielectric layer 14.
FIG. 1F shows the precursor 10 after a second photoresist layer 20 has been deposited. Nitrogen (N2) 22 in photoresist poison 18 diffuses into the second photoresist layer 20. The N2 22 interferes with the photochemistry of the second photoresist layer 20 during selective exposure, preventing depolymerization of the second photoresist 20.
FIG. 1G shows precursor 10 after selective exposure of the second photoresist 20. Residual poisoned photoresist 24 is the result of incomplete depolymerization of the photoresist 20. This poisoned photoresist 24 is not removed during developing, and as a result masks portions of dielectric 14 that are intended to be etched during trench formation.
FIG. 1H shows the precursor 10 after a trench etch step. The poisoned photoresist 24 has masked portions of dielectric layer 18, resulting in humps 26. These humps 26 are device defects that may result in incomplete, or no, contact between via and trench conductor materials. Such defects introduced during the photolithographic processing of integrated circuits lead to decreased device speed, or in some cases inoperability of the integrated circuit.
There is therefore a need for a photolithographic process that reduces defects caused by poisoning of photoresists by residual N2 introduced during a dielectric etch step.
There is also a need for a photolithographic process that provides an etch step having an etch chemistry that provides selectivity and profile control comparable to that provided by N2, but that prevents, avoids or ameliorates photoresist poisoning caused by N2 in the etch chemistry.